The Bosch process is a plasma etch process that has been widely used to fabricate deep vertical (high aspect ratio) features (with depth such as tens to hundreds of micrometers), such as trenches and vias, in the semiconductor industry. The Bosch process comprises cycles of alternating etching steps and deposition steps. Details of the Bosch process can be found in U.S. Pat. No. 5,501,893, which is hereby incorporated by reference. The Bosch process can be carried out in a plasma processing apparatus configured with a high-density plasma source, such as an inductively coupled plasma (ICP) source, in conjunction with a radio frequency (RF) biased substrate electrode. Process gases used in the Bosch process for etching silicon can be sulfur hexafluoride (SF6) in an etching step and octofluorocyclobutane (C4F8) in a deposition step. The process gas used in the etching step and the process gas used in the deposition step are respectively referred to as “etch gas” and “deposition gas” hereinbelow. During an etching step, SF6 facilitates spontaneous and isotropic etching of silicon (Si); during a deposition step, C4F8 facilitates the deposition of a protective polymer layer onto sidewalls as well as bottoms of the etched structures. The Bosch process cyclically alternates between etch and deposition steps enabling deep structures to be defined into a masked silicon substrate. Upon energetic and directional ion bombardment, which is present in the etching steps, any polymer film coated in the bottoms of etched structures from the previous deposition step will be removed to expose the silicon surface for further etching. The polymer film on the sidewall will remain because it is not subjected to direct ion bombardment, thereby, inhibiting lateral etching.
One limitation of the Bosch process is roughened sidewalls of etched deep features. This limitation is due to the periodic etch/deposition scheme used in the Bosch process and is known in the art as sidewall “scalloping”. For many device applications, it is desirable to minimize this sidewall roughness or scalloping. The extent of scalloping is typically measured as a scallop length and depth. The scallop length is the peak-to-peak distance of the sidewall roughness and is directly correlated to the etch depth achieved during a single etch cycle. The scallop depth is the peak to valley distance of sidewall roughness and is correlated to the degree of anisotropy of an individual etching step. The extent of scallop formation can be minimized by shortening the duration of each etch/deposition step (i.e. shorter etch/deposition steps repeated at a higher frequency).
In addition to smoother feature sidewalls it is also desirable to achieve a higher overall etch rate. The overall etch rate is defined as a total depth etched in a process divided by a total duration of the process. The overall etch rate can be increased by increasing efficiency within a process step (i.e. decreasing dead time).
FIG. 1 illustrates a conventional plasma processing apparatus 100 for processing a substrate 120 comprises a substrate support 130 and a processing chamber 140 enclosing the substrate support 130. The substrate 120 may be, for example, a semiconductor wafer having diameters such as 4″, 6″, 8″, 12″, etc. The substrate support 130 may comprise, for example, a radio frequency (RF) powered electrode. The substrate support 130 may be supported from a lower endwall of the chamber 140 or may be cantilevered, e.g., extending from a sidewall of the chamber 140. The substrate 120 may be clamped to the electrode 130 either mechanically or electrostatically. The processing chamber 140 may, for example, be a vacuum chamber.
The substrate 120 is processed in the processing chamber 140 by energizing a process gas in the processing chamber 140 into a high density plasma. A source of energy maintains a high density (e.g., 1011-1012 ions/cm3) plasma in the chamber 140. For example, an antenna 150, such as the planar multiturn spiral coil shown in FIG. 1, a non-planar multiturn coil, or an antenna having another shape, powered by a suitable RF source and suitable RF impedance matching circuitry inductively couples RF energy into the chamber to generate a high density plasma. The RF power applied to the antenna 150 can be varied according to different process gases used in the chamber 140 (e.g. etch gas containing SF6 and deposition gas containing C4F8). The chamber 140 may include a suitable vacuum pumping apparatus for maintaining the interior of the chamber 140 at a desired pressure (e.g., below 5 Torr, preferably 1-100 mTorr). A dielectric window, such as the planar dielectric window 155 of uniform thickness shown in FIG. 1, or a non-planar dielectric window (not shown) is provided between the antenna 150 and the interior of the processing chamber 140 and forms a vacuum wall at the top of the processing chamber 140. A gas delivery system 110 can be used to supply process gases into the chamber 140 through a primary gas ring 170 or center injector 180 below the dielectric window 155. Details of the plasma processing apparatus 100 in FIG. 1 are disclosed in commonly-owned U.S. Patent Application Publication Nos. 2001/0010257, 2003/0070620, U.S. Pat. No. 6,013,155, or U.S. Pat. No. 6,270,862, each of which is incorporated herein by reference in its entirety.
Gas delivery systems designed for fast gas switching are disclosed in commonly-owned U.S. Pat. Nos. 7,459,100 and 7,708,859 and U.S. Patent Publication Nos. 2007/0158025 and 2007/0066038, the disclosures of which are hereby incorporated by reference.
The substrate 120 preferably comprises a silicon material such as a silicon wafer and/or polysilicon. Various features such as holes, vias and/or trenches are to be etched into the silicon material. A patterned masking layer (e.g. photoresist, silicon oxide, and/or silicon nitride) having an opening pattern for etching desired features is disposed on the substrate 120.
One problem of the apparatus 100 of FIG. 1 is that the primary gas ring 170 is located closer to the periphery of the substrate 120 than to the center, which increases etch rate due to the time needed for complete replacement of one process gas to another process gas over the surface of the substrate 120 and can lead to process non-uniformity due to gas pressure non-uniformity across the substrate during processing.